The Kingmakers & their King: ASML's Monopoly.
Financial & Strategic Alignment.
Major semiconductor foundries like TSMC, Samsung, and Intel have closely aligned themselves with ASML, the sole supplier of EUV lithography tools. In 2012, ASML launched a customer co-investment program that saw Intel, Samsung, and TSMC take equity stakes and fund ASML's EUV R&D Intel committed ~$3 billion for a ~15% stake, Samsung invested €503 million for ~3%, and TSMC put in $1 billion for ~5%. This partnership spread development risk and ensured EUV's success was in the shared interest of ASML and the foundries. By funding ASML's technology, these chipmakers essentially reinforced ASML's monopoly in EUV - there would be one dominant solution, and they would have privileged access to it. Foundries have arguably benefited from ASML's dominance. EUV lithography has immense barriers to entry, both technical and financial, which has limited competition in leading-edge chip manufacturing[1]. For example, GlobalFoundries (GF) – once a rival in advanced process nodes – quit 7nm development in 2018 partly due to the prohibitive cost of EUV tools and R&D. GF realized it would need to spend "tens of billions" on EUV equipment and new fabs to compete, costs it couldn't justify with its smaller scale. By pricing out smaller players, ASML's expensive EUV systems effectively concentrated cutting-edge chip production in the hands of a few foundries who could afford them. Indeed, TSMC and Samsung – who invested early in EUV – became the only foundries (aside from Intel for its own products) able to mass-produce 5nm and 3nm chips. TSMC alone commands about 90% of 5nm/4nm chip production (which relies on EUV) making it de facto a monopoly in high-end foundry services. This dominant market position allows TSMC (and Samsung to a lesser extent) to charge premium prices for leading-edge chips, bolstering their margins. Chip designers have little choice – if you need an Apple A17 or Nvidia H100 made, "the use of an ASML machine is inescapable" at those geometries In practice that means you must go to a foundry that has EUV, letting TSMC/Samsung leverage their EUV-enabled capacity for pricing power. There are also direct strategic ties that bind foundries to ASML. Being ASML's best customers often comes with perks like early access to next-generation tools. Intel has reportedly secured 6 of the first 10 High-NA EUV machines ASML will ship in 2024, essentially cornering the initial supply of ASML's upcoming technology Samsung's vice chairman even stated they "secured priority" for High-NA EUV after Samsung invested $355 million in ASML's new facility in Korea (Notably, TSMC currently operates about 70% of all EUV tools in the world, but for High-NA they may receive shipments after Intel and Samsung) These arrangements show how tightly the foundries work with ASML - they are willing to pour capital into ASML's roadmap and even pre-pay or invest in capacity to ensure they stay ahead. Such exclusive or priority deals reinforce ASML's monopoly (the tools remain scarce and controlled) while giving each foundry a strategic edge over competitors in timing. In short, the leading foundries have structured their strategies around ASML's lithography, and in doing so they help perpetuate ASML's near-monopoly in advanced lithography.Market Dynamics.
EUV lithography's dominance raises the question:Why haven't alternative lithography technologies taken hold?
Over the years, several next-generation lithography (NGL) ideas have been explored, but the industry largely stuck with ASML's EUV roadmap for practical reasons. Some notable alternatives and their fates:
- Multiple Electron-Beam Lithography (MEBL) - Instead of using one beam through a mask (as in optical lithography), this approach would use many electron beams writing in parallel to pattern a wafer directly (maskless). In theory, massively parallel e-beams could achieve high resolution without the costly optics of EUV. TSMC quietly invested in multi-beam e-beam research for years, viewing it as a fallback if EUV stumbled. As of 2014, TSMC presented data suggesting that at the 7nm node, a multi e-beam system could be more cost-effective than EUV if EUV's throughput remained low TSMC's Dr. Burn Lin noted they had run a “solo and parallel effort” on e-beam since 2005. However, EUV progress accelerated (with industry-wide R&D support) and reached sufficient throughput, while multi-beam lithography remained unproven for high-volume manufacturing. ASML also acquired one of the leading e-beam startups (Mapper) and focused e-beam technology into mask inspection tools rather than replacing optical lithography. Ultimately, no e-beam solution was ready in time to beat EUV, so foundries continued with ASML’s tools. The high R&D cost and engineering challenges (writing speed, beam coordination, defect control) kept e-beam confined to mask writing and research, not fab production.
- Nanoimprint Lithography (NIL) - This method “stamps” patterns onto wafers like a rubber stamp rather than using light. Canon has been developing NIL for over a decade, and in 2023 it announced a modern tool (FPA-1200NZ2C) capable of patterning chips down to 5nm, with a roadmap to 2nm. Nanoimprint doesn’t require expensive lasers or complex optics – a hardened mold carries the circuit pattern and physically imprints it into resist, avoiding the elaborate EUV light generation and projection system. In theory this could drastically lower cost and energy usage. However, NIL comes with significant challenges. Tool throughput and defectivity are concerns – aligning and pressing the mold without flaws is difficult, and any dust or imperfection can ruin patterns. Canon’s NIL has “a rather meager yield rate” compared to ASML’s photolithography, meaning more defective chips unless that improves. This has so far kept fabs from adopting NIL for critical layers. Instead, NIL is finding niche uses: Canon’s first customer is Kioxia (a flash memory maker), which will use NIL for some NAND flash production. Memory tolerances and repetitive structures might suit NIL better initially than logic chips. Notably, Intel and Samsung are watching NIL closely – in 2024, Canon delivered an NIL tool to the Texas Institute for Electronics, a research consortium backed by Intel, Samsung, NXP, and DARPA, specifically to study NIL for advanced chips. This indicates that while NIL isn’t mainstream, major players are investing in its development in case it becomes viable. For now, though, NIL remains an experimental alternative; foundries stick with EUV for high-volume manufacturing due to its maturity.
- Directed Self-Assembly (DSA) - DSA is a technique where special materials spontaneously form very fine patterns, guided by a simpler pre-pattern made by lithography. It’s seen as a way to extend existing lithography by letting chemistry do some of the hard work. Companies like Intel and research orgs (IMEC) have studied DSA to reduce multi-patterning steps. However, DSA is not a standalone lithography tool; it must be combined with conventional lithography and has challenges in defect control and integration. It has thus far been used only in limited ways. DSA complements EUV or DUV processes rather than replacing them
- Others - Historically, X-ray lithography and electron/ion projection lithography were explored in the 1990s and 2000s as potential successors to optical lithography. These approaches struggled with technical issues (X-ray mask making was extremely difficult, for example) and were eventually shelved. High-NA EUV, meanwhile, is not an alternative but an evolution of EUV (using a larger numerical aperture lens to improve resolution) – and that too is being delivered by ASML, reinforcing the same supply chain.
Why the lack of adoption?
The short answer is that EUV, backed by industry consortia and enormous R&D investment, reached the finish line first for sub-10nm patterning. Competing technologies either needed more time/money to mature or addressed only niche needs. By the late 2010s, ASML had working EUV prototypes, and chipmakers were eager for a solution – they collectively poured billions into ASML to overcome EUV’s hurdles. This concerted push was something no alternative had to the same degree. For a foundry, deviating from the mainstream solution is risky and costly. Adopting a new lithography tool isn’t like swapping out one machine; it requires developing an entire process ecosystem (materials, masks or molds, design rules, defect mitigation, technician expertise) from scratch. The cost of switching is a huge deterrent. TSMC, for instance, has spent on the order of tens of billions building EUV-equipped fabs and perfecting processes for those tools. Abandoning or duplicating that effort for a different technology would be financially painful. Unless an alternative is clearly superior, the foundries prefer to ride the known roadmap (DUV multi-patterning, then EUV, now High-NA EUV) that has well-understood challenges and a clear support network. There's also a coordination effect: chip equipment, EDA software, and materials suppliers all coalesced around making EUV work. That synergy is hard to replicate for a dark-horse technology without industry-wide commitment. In essence, the foundries have primarily stuck with ASML’s roadmap, occasionally funding small projects in alternatives as insurance. But until those alternatives prove themselves decisively, the status quo (ASML’s EUV) remains the workhorse. As one industry analysis put it, “EUV has received the bulk of the industry’s R&D support… while e-beam’s development [was] largely a solo effort”. The result is that EUV is in high-volume use today, whereas other solutions lag in readiness.Long term risk.
From a long-term perspective, the foundries' relationship with ASML is both a strength and a potential vulnerability. On one hand, they have every incentive to maintain ASML’s dominance as long as it serves their needs. On the other hand, if circumstances change – technologically or geopolitically – their incentives could shift toward embracing an alternative. If a truly disruptive lithography alternative emerged, foundries would certainly consider it – especially if it offered lower costs, higher throughput, or freedom from bottlenecks. In such a scenario, a foundry’s incentive to switch would depend on the performance and maturity of the new tool. For example, if Canon’s nanoimprint or another method evolved to pattern, say, 2nm chips at high volume with far cheaper tools, the economic pull would be strong. A foundry could reduce its capital expenditures (ASML’s latest EUV tools cost $150–$200 million each, and the upcoming High-NA EUV are priced around $380 million a piece and potentially offer lower fabrication prices or enjoy higher margins. However, no foundry would jump ship immediately – they would likely introduce the alternative gradually, perhaps using it for less critical layers or running a pilot line, until it’s proven. They would also weigh how switching might affect their customers: new design rules or uncertainties could scare away some chip design clients. In short, foundries are open to better technology, but the bar for “better” is extremely high when the existing solution (ASML EUV) is working and continuously improving. At present, ASML's monopoly does create some supply-chain risk for the foundries. Relying on a single supplier for a mission-critical tool means any disruption at ASML can reverberate across the industry. This risk became evident in early 2022 when a fire at an ASML component factory in Berlin raised alarms about EUV tool production. The damaged area made wafer clamps for EUV machines, and analysts warned the incident “could be devastating for the industry” if it delayed EUV shipments. Even though ASML managed to recover without significant schedule slips, the episode highlighted that an accident at ASML can stall fab expansion plans globally. The lead time for an EUV machine is 12–18 months; any hiccup could leave foundries waiting and unable to meet customer demands. Foundries mitigate this by working closely with ASML on forecasts and support (and by ordering well in advance), but the risk remains. In this sense, ASML’s monopoly is a single point of failure in the supply chain – a fact not lost on industry observers. Despite this risk, foundries often view ASML's dominance as stabilizing in the short term. ASML has a well-oiled support network and a queue of suppliers, and it coordinates with chipmakers to improve uptime and output. It’s easier for foundries to manage one primary lithography supplier relationship. If multiple competing lithography vendors existed, fabs might need to qualify more tools and deal with more variation. Right now, everyone can focus on improving EUV’s process integration (resists, masks, etch, etc.) rather than splitting effort among different litho technologies. Thus, as long as ASML can meet demand, having one expert supplier simplifies certain aspects of operations. Geopolitical and economic factors are increasingly looming over this landscape, however. Advanced lithography has become a flashpoint in U.S.-China tech tensions. The U.S. government has explicitly barred ASML from shipping EUV tools to China, seeing those machines as too strategic to risk his creates a paradox: China is incentivized to develop an alternative lithography indigenously, since it cannot buy EUV. Backed by massive state funds, Chinese efforts are underway to improve domestic DUV tools and even pursue longer-term EUV-like technologies. If in a decade China succeeds in creating a viable EUV alternative (or a novel technique), it could upset ASML’s monopoly. Chinese fabs would adopt it out of necessity, and if it’s competitive, other foundries might finally have a second source option. However, there are many hurdles (technical and IP-related), and non-Chinese companies might be hesitant to use Chinese lithography tools due to trade restrictions or trust issues. Still, the strategic pressure is there – the more geopolitical blocs vie for semiconductor sovereignty, the more interest in having independent lithography capabilities. Governments in the US and Europe are investing in semiconductor research through initiatives like the CHIPS Act, some of which could support exploratory lithography projects. In the US, DARPA has funded programs in nanoimprint and electron-beam lithography aimed at long-term solutions for low-volume military chip fabrication. These are not immediate threats to ASML, but they indicate a recognition that relying on one Dutch company for a critical technology is a national security consideration.Foundries themselves are largely keeping their options open while committing to ASML for the foreseeable future. TSMC, Samsung, and Intel all have aggressive roadmaps that assume ASML’s tools (including High-NA EUV in the late 2020s). They have little incentive to rock the boat when ASML’s monopoly tools are enabling their own success – for example, TSMC’s continued leadership at the cutting edge is intimately tied to early and effective use of ASML’s EUV machines. But these companies also hedge bets through research consortia and watching emerging tech (as seen with Intel and Samsung's interest in Canon’s NIL trials. If an alternative starts to look promising – whether for performance, cost, or due to political mandate – the foundries would pivot out of self-interest. Their ultimate incentive is to stay competitive in chip production. Today, that means sticking with ASML’s monopoly because it’s the only game in town for leading edge lithography and it has helped them build moats around their business. In the future, staying competitive might mean backing a new approach if ASML ever falters or if someone develops a clearly superior mousetrap.